Google has expanded its eighth-generation accelerator family with two specialized systems: the TPU 8tx, built for confidential computing, and the dual-chip TPU 8i Max, designed for long-context inference workloads. They join the TPU 8t training chip and TPU 8i inference chip introduced in April, marking the first time Google has launched four TPU systems within a single year. Google has not yet announced release dates or pricing for the new hardware, listing both as coming soon alongside the earlier systems. [1][2]
The TPU 8tx pairs TPU 8t silicon with 5th Gen AMD EPYC host processors instead of Arm-based Axion chips. Targeted at regulated enterprises and governments, it features hardware isolation, PCIe link encryption, and secure memory enclaves so teams can fine-tune proprietary models without moving sensitive data between clusters. It also adopts Google's Boardfly network, which the company claims cuts latency by up to 2x compared to the TPU 8t. Meanwhile, the TPU 8i Max combines two TPU 8i chips onto a single package, doubling compute, High Bandwidth Memory bandwidth, and on-chip SRAM to 768MB within an existing rack footprint. [1][2]
Alongside the systems, Google open-sourced TPU Sync, a C++ library that pools chip and host memory to cut key-value transfer latency and time-to-first-token delays by an average of 90 percent on large mixture-of-experts models. The company also announced general availability on Google Kubernetes Engine for dynamic slicing and Cloud Pathways, the DeepMind runtime powering Gemini. Google claims its TPU line now serves nearly 100 customers, including labs, retailers, and trading firms. [1][2]