Reported by 2 outlets

Nvidia trims memory and interconnect bandwidth targets for upcoming Vera Rubin platform

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Nvidia has quietly lowered published specifications for its next-generation Vera Rubin artificial intelligence computing architecture. Updated materials reveal reductions to listed HBM4 memory bandwidth by up to 26 percent alongside cutbacks to sixth-generation NVLink interconnect speeds across several configurations. [1][2]

The adjustments, noticed through comparisons of archived platform documents against current listings, were made without any public announcement. While Nvidia trimmed internal memory and NVLink interconnect throughput across setups such as the Vera Rubin NVL72, it simultaneously increased listed figures for scale-out networking bandwidth. [1][2]

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2 outlets
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[1] Wccftech

NVIDIA Quietly Lowers Vera Rubin HBM4 Bandwidth By Up To 26%, NVLink Speeds Also Reduced

NVIDIA has quietly revised the specifications of its next-generation Vera Rubin AI computing platform, reducing HBM4 memory bandwidth and sixth-generation NVLink bandwidth across multiple configurations while increasing scale-out networking capabilities. Interestingly, the changes appear to have been made over a month ago, rather than being introduced recently.

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